I write weird code that does weird things sometimes.
Toronto smells weird.
Seems to be activity now, it looks like it needed a longer reset.
My best guess is that /RESET needs the clock to pulse, and since my reset delay was 10msec the clock wasn't toggling during the reset phase.
Seems to be activity now, it looks like it needed a longer reset.
My best guess is that /RESET needs the clock to pulse, and since my reset delay was 10msec the clock wasn't toggling during the reset phase.
Something must be up, because the EEPROM is full of NOPs so it should just be acting as a counter.
Something must be up, because the EEPROM is full of NOPs so it should just be acting as a counter.
61c64
61c64
I think I’ll be okay once I understand the bus architecture; it’s a bit confusing to have peripherals not be memory mapped like I’m used to.
I guess step one is just an eeprom containing NOPs?
I think I’ll be okay once I understand the bus architecture; it’s a bit confusing to have peripherals not be memory mapped like I’m used to.
I guess step one is just an eeprom containing NOPs?
Just at a glance it seems more intimidating than the 6502, and I'm a bit lost as to where to start.
I did program an ATTiny85 to provide a 512KHz clock that can be divided based on the state of a few pins down to ~128KHz.
Just at a glance it seems more intimidating than the 6502, and I'm a bit lost as to where to start.
I did program an ATTiny85 to provide a 512KHz clock that can be divided based on the state of a few pins down to ~128KHz.
I probably have everything I need: z80, '74138, roms, srams, and that 8255 should be good enough for blinky.
I probably have everything I need: z80, '74138, roms, srams, and that 8255 should be good enough for blinky.
Why 9.216MHz though?
9600*16 = 153,600
Just trying to wrap my head around this; I'm not used to getting this far into clocking yet.
Why 9.216MHz though?
9600*16 = 153,600
Just trying to wrap my head around this; I'm not used to getting this far into clocking yet.
That's going to be so much easier than trying to understand the ch32v003 reference manual this late.
I wonder if I should generate TXCLK/RXCLK and CLK separately, or just divide CLK by something using a '393?
That's going to be so much easier than trying to understand the ch32v003 reference manual this late.
I wonder if I should generate TXCLK/RXCLK and CLK separately, or just divide CLK by something using a '393?
Those 3 pins on the left are really holding it in place.
Those 3 pins on the left are really holding it in place.
github.com/TaraHoleInIt...
github.com/TaraHoleInIt...
I need to find a way to get under the chip and apply a pulling force on it.
I need to find a way to get under the chip and apply a pulling force on it.