Stefan Abi-Karam
@stefanabikaram.com
Graduate Student (@SharcLab) + Research Faculty at @GeorgiaTech 🐝
Working on digital hardware design + AI
https://stefanabikaram.com/
Working on digital hardware design + AI
https://stefanabikaram.com/
Shout out to all the CGRA folks, all jokes are in good fun
September 8, 2025 at 1:43 AM
Shout out to all the CGRA folks, all jokes are in good fun
I have yet to read “Computer Architecture: A Quantitative Approach”
September 4, 2025 at 2:38 AM
I have yet to read “Computer Architecture: A Quantitative Approach”
In honor of the upcoming ICLAD conference, here’s a gem from one of the first LLM-for-hardware-design panels that was at ICCAD. How far we have come.
June 16, 2025 at 10:53 PM
In honor of the upcoming ICLAD conference, here’s a gem from one of the first LLM-for-hardware-design panels that was at ICCAD. How far we have come.
This is verbatim real review feedback we got for a conference submission
June 16, 2025 at 10:50 PM
This is verbatim real review feedback we got for a conference submission
I lost my department's graduate meme competition this year
We live in a fallen world
We live in a fallen world
April 27, 2025 at 4:44 PM
I lost my department's graduate meme competition this year
We live in a fallen world
We live in a fallen world
Remember kids, FPGA placement is always a
quadratic assignment problem
quadratic assignment problem
April 21, 2025 at 2:16 AM
Remember kids, FPGA placement is always a
quadratic assignment problem
quadratic assignment problem
dam overleaf, you dont have to be that mean, im trying my best 🥹
March 4, 2025 at 1:55 AM
dam overleaf, you dont have to be that mean, im trying my best 🥹
January 10, 2025 at 11:18 PM
Verilog-Eval and RTLLM go brrr...
Finally working with local LLM inference after some bugs with vLLM
Finally working with local LLM inference after some bugs with vLLM
January 8, 2025 at 1:03 AM
Verilog-Eval and RTLLM go brrr...
Finally working with local LLM inference after some bugs with vLLM
Finally working with local LLM inference after some bugs with vLLM
Next challenge is this “chain game” knockoff of Triggle which requires tree search (ex. minimax, alpha-beta).
For this one I also want to learn how to implement Monte Carlo tree search which would be helpful for my ongoing research work.
For this one I also want to learn how to implement Monte Carlo tree search which would be helpful for my ongoing research work.
January 7, 2025 at 5:42 AM
Next challenge is this “chain game” knockoff of Triggle which requires tree search (ex. minimax, alpha-beta).
For this one I also want to learn how to implement Monte Carlo tree search which would be helpful for my ongoing research work.
For this one I also want to learn how to implement Monte Carlo tree search which would be helpful for my ongoing research work.
Programmed a solver for this IQ Fit puzzle game using mixed integer programming! Used a combination of Python + PuLP + CBC.
Hope to write about it on my website soon!
Hope to write about it on my website soon!
January 7, 2025 at 5:34 AM
Programmed a solver for this IQ Fit puzzle game using mixed integer programming! Used a combination of Python + PuLP + CBC.
Hope to write about it on my website soon!
Hope to write about it on my website soon!
This joke is funny until you are sitting in a conference talk and the speaker’s results slide doesn’t look to far off from this
December 1, 2024 at 12:14 AM
This joke is funny until you are sitting in a conference talk and the speaker’s results slide doesn’t look to far off from this
Favorite fact from the new BobbyBroccoli documentary about cold fusion: Georgia Tech was one of the earliest schools to “reproduce” the U of U results but then redacted their result four days later
December 1, 2024 at 12:05 AM
Favorite fact from the new BobbyBroccoli documentary about cold fusion: Georgia Tech was one of the earliest schools to “reproduce” the U of U results but then redacted their result four days later
Shoutout to when I discovered that in Xilinx’s Vitis HLS 2023.1, the “help” command causes a segfault
November 30, 2024 at 11:54 PM
Shoutout to when I discovered that in Xilinx’s Vitis HLS 2023.1, the “help” command causes a segfault
Anytime a new version of any chip design / EDA tool is released
November 30, 2024 at 11:48 PM
Anytime a new version of any chip design / EDA tool is released
I hate debugging GitHub actions
November 15, 2024 at 4:01 AM
I hate debugging GitHub actions
How writing HLS code feels
November 10, 2024 at 3:31 PM
How writing HLS code feels
Some photos from the setup we have in our lab (Sharc Lab @ Georgia Tech)
- 8 PYNQ Boards with Xilinx Zynq-7000s
- 4 Xilinx ZCU102 Dev Boards
- 3 Raspberry Pis
All networked together so we can do multi-FPGA system experiments as well as allow remote access for our FPGA/HLS course and grad students.
- 8 PYNQ Boards with Xilinx Zynq-7000s
- 4 Xilinx ZCU102 Dev Boards
- 3 Raspberry Pis
All networked together so we can do multi-FPGA system experiments as well as allow remote access for our FPGA/HLS course and grad students.
November 10, 2024 at 3:31 PM
Some photos from the setup we have in our lab (Sharc Lab @ Georgia Tech)
- 8 PYNQ Boards with Xilinx Zynq-7000s
- 4 Xilinx ZCU102 Dev Boards
- 3 Raspberry Pis
All networked together so we can do multi-FPGA system experiments as well as allow remote access for our FPGA/HLS course and grad students.
- 8 PYNQ Boards with Xilinx Zynq-7000s
- 4 Xilinx ZCU102 Dev Boards
- 3 Raspberry Pis
All networked together so we can do multi-FPGA system experiments as well as allow remote access for our FPGA/HLS course and grad students.
Prototype FPGA placer I wrote to learn Rust. Uses a really basic simulated annealing approach. Hope to integrate into an ongoing research project down the road. #fpga #eda #chipdesign
stefanabikaram.com/writing/fpga...
stefanabikaram.com/writing/fpga...
November 10, 2024 at 3:25 PM
Prototype FPGA placer I wrote to learn Rust. Uses a really basic simulated annealing approach. Hope to integrate into an ongoing research project down the road. #fpga #eda #chipdesign
stefanabikaram.com/writing/fpga...
stefanabikaram.com/writing/fpga...