Kat 🇨🇦
@northernpaws.bsky.social
She/They | 🏳️⚧️ Software Engineer | Building various audio and music devices
Website: https://northernpaws.io
Patreon: https://www.patreon.com/c/Northernpaws
GitHub: https://github.com/northernpaws
come see me bap at projects with varying success
Website: https://northernpaws.io
Patreon: https://www.patreon.com/c/Northernpaws
GitHub: https://github.com/northernpaws
come see me bap at projects with varying success
Ooh those look great!
November 4, 2025 at 9:43 AM
Ooh those look great!
Current plan is that the internal audio engine pipeline will be 24bit 48kHz, but that’s still to be determined. I would like to bump it to 32bit for the extra headroom for effects and processing, but that might be pushing the RAM capacity - will need to do a bunch of testing to see.
November 3, 2025 at 4:53 AM
Current plan is that the internal audio engine pipeline will be 24bit 48kHz, but that’s still to be determined. I would like to bump it to 32bit for the extra headroom for effects and processing, but that might be pushing the RAM capacity - will need to do a bunch of testing to see.
Audio sampling is stored at 16bit 44.1kHz as thats a nice middle ground for quality vs file size.
Audio inputs are sampled at 24bit for noise headroom, and then downsampled.
Samples can be streamed from a pattern pool loaded from SD card, internal storage, or RAM depending on size and usage.
Audio inputs are sampled at 24bit for noise headroom, and then downsampled.
Samples can be streamed from a pattern pool loaded from SD card, internal storage, or RAM depending on size and usage.
November 3, 2025 at 4:53 AM
Audio sampling is stored at 16bit 44.1kHz as thats a nice middle ground for quality vs file size.
Audio inputs are sampled at 24bit for noise headroom, and then downsampled.
Samples can be streamed from a pattern pool loaded from SD card, internal storage, or RAM depending on size and usage.
Audio inputs are sampled at 24bit for noise headroom, and then downsampled.
Samples can be streamed from a pattern pool loaded from SD card, internal storage, or RAM depending on size and usage.
Because of the complex scope I have for the audio processing side, offloading as much processing as I can peripherals like the FMC (Flexible Memory Controller) and DMA the start is a priority to keep as many cycles as possible free for audio track and instrument processing.
November 3, 2025 at 4:44 AM
Because of the complex scope I have for the audio processing side, offloading as much processing as I can peripherals like the FMC (Flexible Memory Controller) and DMA the start is a priority to keep as many cycles as possible free for audio track and instrument processing.
And then in theory I can configure the DMA2D graphics accelerator to directly use the display’s memory address as a target for fill, blend, and aliasing operations - also freeing CPU cycles!
November 3, 2025 at 4:44 AM
And then in theory I can configure the DMA2D graphics accelerator to directly use the display’s memory address as a target for fill, blend, and aliasing operations - also freeing CPU cycles!
I put a piece of kapton tape down over the whole area. Carefully scored it with a knife and then used my tweezers to peel it away, leaving a large section under the connected with a tongue over the pins I needed to swap. Then hot-air soldered the connector down over the top of it.
November 2, 2025 at 6:53 PM
I put a piece of kapton tape down over the whole area. Carefully scored it with a knife and then used my tweezers to peel it away, leaving a large section under the connected with a tongue over the pins I needed to swap. Then hot-air soldered the connector down over the top of it.
As far as I can find, no one has implemented the STM32’s FMC SRAM/PSRAM/NOR controller in Rust (let alone Embassy..), so I’ll be writing a driver from scratch over the next few days. I’ve not done a register-based driver in years so this will be interesting…
November 2, 2025 at 6:44 PM
As far as I can find, no one has implemented the STM32’s FMC SRAM/PSRAM/NOR controller in Rust (let alone Embassy..), so I’ll be writing a driver from scratch over the next few days. I’ve not done a register-based driver in years so this will be interesting…
Given it worked intermittently before when I put some downward pressure on the flex cable I'm going to guess one of the pins possibly isn't firmly connected (even though I can't wiggle any of them), so try re-touching them for a next step I guess? 3/3
November 1, 2025 at 1:41 AM
Given it worked intermittently before when I put some downward pressure on the flex cable I'm going to guess one of the pins possibly isn't firmly connected (even though I can't wiggle any of them), so try re-touching them for a next step I guess? 3/3
Left the board and display to sit for 10 minutes while I got some food, and when I turned it back on, no image again! Tried cleaning the connector again, and still can't get the image to come back.. 2/3
November 1, 2025 at 1:41 AM
Left the board and display to sit for 10 minutes while I got some food, and when I turned it back on, no image again! Tried cleaning the connector again, and still can't get the image to come back.. 2/3
Can’t recommend having a thermal camera enough. My Infiray P2 Pro with the macro lens is incredible debugging tool. Once I saw the short, all I had to do was look at the board with thermal camera and saw the LED lighting up incredibly hot.
October 30, 2025 at 7:44 AM
Can’t recommend having a thermal camera enough. My Infiray P2 Pro with the macro lens is incredible debugging tool. Once I saw the short, all I had to do was look at the board with thermal camera and saw the LED lighting up incredibly hot.
Ooh that’s very good 👀
October 30, 2025 at 7:38 AM
Ooh that’s very good 👀
Plot twist: it’s sqlite, in a zip file, with a custom extension
October 30, 2025 at 4:35 AM
Plot twist: it’s sqlite, in a zip file, with a custom extension
I had self-tests that check data validity on the configuration registers because I wasn’t sure if my memory mapping was correct, but it just so happened that I’d enabled the bit 0 option in each register so it wasn’t caught…
October 29, 2025 at 10:21 AM
I had self-tests that check data validity on the configuration registers because I wasn’t sure if my memory mapping was correct, but it just so happened that I’d enabled the bit 0 option in each register so it wasn’t caught…