Keenan Tims
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ktims.nonexistent.ca.ap.brid.gy
Keenan Tims
@ktims.nonexistent.ca.ap.brid.gy
2 followers 0 following 78 posts
I enjoy long coding sessions in #rust, LED-lit #electronics projects, #linux systems integration, and learning about any interesting technology.

AMA about the 737MAX […]

🌉 bridged from ⁂ https://nonexistent.ca/@ktims, follow @ap.brid.gy to interact
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ktims.nonexistent.ca.ap.brid.gy
This is the situation after an hour or so of data collection, with the PLL tuning back to defaults (65536s). Trigger on channel 1 (yellow), the PPS out from PRS10, cyan is PPS out from the GPS. The PRS10 seems to be working totally fine.

We should expect the […]

[Original post on nonexistent.ca]
A scope shot with infinite persistence on, showing a stable yellow trace and a blue trace with approximately -5/+60ns of jitter.
January 18, 2026 at 2:34 AM
ktims.nonexistent.ca.ap.brid.gy
Picked up a very obsolete Symmetricom TimeSource 2700 on eBay, solely to harvest the PRS10 Rubidium Frequency Standard inside (which go for more than double what I paid for the donor). Now I can proudly report that I have an atomic clock!

Preliminary tests […]

[Original post on nonexistent.ca]
A Symmetricom TimeSource 2700 on the kitchen table, with its original binder-bound paper manual sitting atop. A Stanford Research Systems PRS10 Rubidium Frequency Standard on the messy bench. In the distance an oscilloscope can be seen measuring time offset between two PPS signals.
January 17, 2026 at 11:42 PM
ktims.nonexistent.ca.ap.brid.gy
Replaced the cheap Netgear switch with a Cisco C2960CX. This increased the static offset from ~1.2μs to ~2μs. Interesting, and seems to corroborate asymmetric delay based on the network switch. I'd need to think a bit more on it and how it interacts with PTP's […]

[Original post on nonexistent.ca]
Another offset plot comparing local offset to the sync source (GPSDO PPS) and PTP source.
January 15, 2026 at 1:40 AM
ktims.nonexistent.ca.ap.brid.gy
How chrony interprets the performance of local PPS vs. PTP. Green trace is the offset of the local clock and GPSDO PPS, captured locally using the BeagleBone timer capture hardware (see my previous posts on that platform). Yellow is the offset between the […]

[Original post on nonexistent.ca]
A Grafana plot showing time offset between the local clock and two of chrony's sources
January 13, 2026 at 7:54 PM
ktims.nonexistent.ca.ap.brid.gy
Finally back to #timenuts stuff! GNSS distribution amplifier seems to be working as designed. S11 seems much higher than expected at only around -5 to -10dB. The filter is meant to be internally matched, as is the amplifier stage so not sure what is going on […]

[Original post on nonexistent.ca]
A photo of a PCB bristling with SMA ports in the omnivise. A port on the left and a port on the bottom are connected to the NanoVNA, which is showing an S11 plot. The plot shows a bandpass response.
December 22, 2025 at 5:46 AM
ktims.nonexistent.ca.ap.brid.gy
While I wait for the distribution amp PCBs to arrive, let's talk about how we make use of the UTC-aligned PPS from GNSS to keep accurate time.

In order to achieve network time synchronization on the order of nanoseconds, it's essential that timestamping […]

[Original post on nonexistent.ca]
A diagram showing the components and control loops of a Linux system using a PHC to synchronize to GNSS.
November 18, 2025 at 8:34 AM
ktims.nonexistent.ca.ap.brid.gy
Now that I have two working platforms to run my timing experiments with, I'll need some tools to set that up.

First on the block is a 4-way distribution amplifier for GNSS (GPS, etc.), so that I can use the same antenna to feed multiple receivers with an […]

[Original post on nonexistent.ca]
A 3D rendering of a PCB bristling with 5 SMA connectors.
November 12, 2025 at 6:47 AM
ktims.nonexistent.ca.ap.brid.gy
I fixed the miniPCIe 3.3V supply on the Intel board. Took some doing to find the problem, I was expecting a fuse or a switching element of some sort. Instead it was a 0Ω resistor that gave up the ghost and became 500Ω. Probably intended to be 'fusible' to save […]

[Original post on nonexistent.ca]
A closeup view of a PCB, with a 0Ω resistor showing some signs of thermal damage.
November 11, 2025 at 2:40 AM
ktims.nonexistent.ca.ap.brid.gy
Time testing platform #2 - BananaPi F3. This one is intriguing for a few reasons. It's one of the few modern SBCs with miniPCIe, it's a desktop-tier RISC-V (8 cores! they're pretty slow, though) which I don't yet have in my stable, and it's considerably […]

[Original post on nonexistent.ca]
The BananaPi F3 board sits on the bench, with a timing-nic PCB installed in its miniPCIe slot. Minigrabbers can be seen supplying power, and another timing-nic PCB sits above on the bench.
November 10, 2025 at 12:49 AM
ktims.nonexistent.ca.ap.brid.gy
Today on adventures in precision time:

* 🛠️ Fixed the DO/DI design error with some bodge wires
* ✨ Amazingly to me, the `eeupdate64e` tool immediately worked to write both the flash image and the eeprom settings (mostly MAC address). `nvmupdate64e` didn't […]

[Original post on nonexistent.ca]
The test setup again, this time with two tiny blue wires criss-crossed over the EEPROM, and the 8P8C breakout attached with a Cat5e cable connected. A terminal window showing 3 panes. Left half is a log generated by `ts2phc` on the test platform indicating that the incoming PPS pulses are consistently only a few ns offset from the PHC. Right top shows the output of `chronyc sources` on another machine, indicating it is synchronized via PTP with the test machine, and a confidence of +/- 166us. Several internet-based servers show current offsets < 5ms, indicating agreement. Right bottom shows the `cgps` output indicating the module has NO FIX, but can see 4 GPS and 1 Beidou satellites and is confident enough to produce a time output.
November 6, 2025 at 7:53 AM
ktims.nonexistent.ca.ap.brid.gy
Some tempering of my enthusiasm is warranted. On to the next problem...

I knew that I was likely going to have to wrangle some 'pirated' docs and tools together to program the EEPROM correctly. Intel does not offer their real documentation and tools to plebs […]

[Original post on nonexistent.ca]
A section of a schematic, showing DIN and DOUT on one device connected to DI and DO, respectively, on another. Seems correct, n'est pas?
November 5, 2025 at 3:17 AM
ktims.nonexistent.ca.ap.brid.gy
On the bright side, after resolving a simple design flaw, THIS MIGHT ACTUALLY WORK FIRST SPIN 😁!

After smoking the 3.3V supply on the motherboard, I attached an external supply and slowly cranked up the current - YOLO! It's not shorted to ground, and […]

[Original post on nonexistent.ca]
The prototype miniPCIe card under discussion is mounted in a MiniPC motherboard, alongside an SSD and memory DIMM. The power LED is on. A 3-wire pigtail is connected to the card and leaves the frame. Flux reside from rework is clearly visible, and the keen observer may notice an askew reworked capacitor. A terminal emulator shows the output of `lspci`. The output indicates that an Intel Ethernet Controller '125f' has been found. It appears to have linked at PCIe 1.0 speeds. After this output, the user has grepped the dmesg output for `igc`, which indicates that it can't start the device due to an invalid MAC address.
November 4, 2025 at 8:36 AM
ktims.nonexistent.ca.ap.brid.gy
I wasn't sure if I'd regret attempting 0402 assembly at home. These parts are truly _tiny_. But with a paste stencil and a steady hand I think I got away with it. The 3D printed jig was a new idea to aid alignment between the stencil and PCB, and it helped a […]

[Original post on nonexistent.ca]
A fully assembled PCB (except for Ethernet jack/magnetics) sits in a Hakko Omnivise. Several wires are attached to various connectors. A mess of wires, USB->serial adapter, and GPS patch antenna can be seen in the background. A PCB with solder paste applied, and several SMD components placed sits on a hot pink 3D printed jig used for solder paste application. 7 tiny 0402 resistors sit on the pink jig, awaiting placement. An orange pair of tweezers sits to the side. A fully soldered PCB sits on the same pink jig as before. Solder bridges between adjacent pins on a QFN package to the left are clearly visible, as is a mis-placed resistor at the top.
November 3, 2025 at 4:31 AM
ktims.nonexistent.ca.ap.brid.gy
I forgot a step along the way, burying it into a thread here.

Between the ATNGW100 and the BeagleBone was an OrangePi One with a simple GPS hat. No fancy GPSDO, no timestamping, just a high quality GPS and a temp sensor.

This performed reasonably well, but […]

[Original post on nonexistent.ca]
A stack of two connected PCBs (only the top one is easily visible). An SMA connector to the west, Ethernet and USB connectors poking out from the board below on the east. Prominent in the centre is an unpopulated holder for a button cell. Not much else is visible of the components.
October 20, 2025 at 5:53 AM
ktims.nonexistent.ca.ap.brid.gy
My current time server implementation is based on the BeagleBone Black and a GPSDO module salvaged from a decommissioned cellular base station (by someone else, and put on eBay for me to buy).

I designed a carrier board to hold the BeagleBone, route the […]

[Original post on nonexistent.ca]
A 3D render of a PCB, having a power connector at the north end, two banks of pin headers to match a BeagleBone Black, and two BNC connectors out the south end.
October 20, 2025 at 3:14 AM
ktims.nonexistent.ca.ap.brid.gy
1/n on time server implementations

First #electronics work in a long while. Started on this one back in May, finally bringing it to the next step.

About to send off to PCB fab, this is a miniPCIe card with an Intel I226V NIC, u-blox GPS, and TCXO onboard […]

[Original post on nonexistent.ca]
A 3D render of a populated PCB, approximately miniPCIe form-factor with an Ethernet connector hanging off the top.
October 20, 2025 at 2:47 AM
ktims.nonexistent.ca.ap.brid.gy
TFW you spend 3 days working on PCB layout for a miniPCIe card, only to realize miniPCIe is getting quite rare, and often no longer includes PCIe lanes. While its replacement (M.2 A+E key 2230) is too small, and the other commonly available slot (M.2 M-key) […]

[Original post on nonexistent.ca]
A screenshot of PCB layout CAD software showing a completed layout for a miniPCIe card.
May 28, 2025 at 4:04 PM
ktims.nonexistent.ca.ap.brid.gy
This is a 16x16 LED display, driven by the host PC over USB. It is based on the very cheap CH32V203 RISC-V controller and MBI5043 display driver. Software in Rust using the Embassy framework.

It's been a while since I've had the wherewithal to work on an […]

[Original post on nonexistent.ca]
January 16, 2025 at 8:43 PM