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@kissa.bsky.social
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Tomfoolery, nincompoopery, programming
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Tweet by @heydonworks that sparked some controversy in 2019: What do you like to do when you're not coding? Vue-based developer: I am fond of cooking, getting stuck into a good graphic novel and— React-based developer: WEIGHTS. BROING DOWN. MORE WEIGHTS. TRUMP. WEIGHTS. GUNS. THE FREE MARKET.
November 7, 2023 at 3:50 PM
Actually need to implement a bunch of arithmetic instructions and test them somehow efficiently. Here's a start.
List of test instructions that ChatGPT wrote me. export const opcodes: { [key: number]: string } = { 0b00000000: "add", // add <op1> <op2> <op3> - op1 <- op2 + op3 0b00000001: "sub", // sub <op1> <op2> <op3> - op1 <- op2 - op3 0b00000010: "mul", // mul <op1> <op2> <op3> - op1 <- op2 * op3 // etc, ending with 0b00001100: "mov" 0b00010000: "adda", // add <op1> <op2> - op1 <- op1 + op2 0b00010001: "suba", // sub <op1> <op2> - op1 <- op1 - op2 0b00010010: "mula", // mul <op1> <op2> - op1 <- op1 * op2 // etc, ending with 0b00011100: "nop" 0b11110000: "hlt", // hlt <?> <?> <?> - halt program execution 0b11110001: "hcf", // hcf <?> <?> <?> - halt and catch fire } Implementation of first 3 arithmetic instructions: if (instr === "add") { writeOperand(op1, op2value + op3value) } if (instr === "sub") { writeOperand(op1, op2value - op3value) } if (instr === "mul") { writeOperand(op1, op2value * op3value) } if (instr === "hlt") { return false } if (instr === "hcf") { error("Machine caught fire") } return true test("arithmetic instructions", () => { testArithmetic(instr.add, 0x1234, 0x2345, 0x3579) testArithmetic(instr.sub, 0x4131, 0x2121, 0x2010) testArithmetic(instr.mul, 111, 20, 2220) testArithmetic(instr.mul, -111, 20, -2220) testArithmetic(instr.mul, -1, -0x7fff, 0x7fff) // TODO should overflow probably // testArithmetic(instr.mul, -1, -0x8000, -0x8000) })
October 19, 2023 at 8:15 PM
Here's the whole set of immediate instructions. This makes me reconsider the design, not only because of the effort of testing all of that stuff but also because I don't want to type "SHLAB" when I just want to do a 1-bit left shift. Maybe it's time to write some programs first and reconsider this.
Previous picture, plus new stuff (8-bit immediate instructions) // If bit 6 (immediate mode) is set, bit 7 sets "byte mode" // // Instruction names are postfixed with "b" for immediate. // Arithmetic instructions with 8-bit immediate operand (96-111): // // addb op1, op2, imm8 ; op1 <- op2 + imm8 01100000 // subb // mulb // divb // modb // andb // orb // xorb // shlb // shrb // add1b // sub1b // movb // // // Arithmetic instructions with 8-bit immediate operand, augmented assignment // (112-127): // // addab op1, imm8 ; op1 <- op2 + imm8 01110000 // subab // mulab // divab // modab // andab // orab // xorab // shlab // shrab // incab // decab // nopab
October 19, 2023 at 9:11 AM
Good two hours reserved for today, let's continue with immediate instructions. Since we have augmented mode too, there's quite a bunch of these.

Instructions that logically take only 1 argument don't make sense, such as INC/DEC, and some potential ones like NEG, NOT, CLR. Except for MOV.
Immediate instructions with 16-bit operand (32-47), plus augmented ones (48-63) (Details omitted due to space constraints) addi op1, op2, imm16 ; op1 <- op2 + imm16 00100000 subi muli divi modi andi ori xori shli shri add1i sub1i movi addai op1, imm16 ; op1 <- op2 + imm16 00110000 subai mulai divai modai andai orai xorai shlai shrai incai decai nopai
October 19, 2023 at 8:08 AM
Next, we want "augmented assignment" forms of those instructions (such as "a += b"), and then also immediate forms taking either a 8-bit or a 16-bit operand. The complexity is quickly getting out of hand. But let's start with the augmented ones:
// // Augmented arithmetic instructions (16-31) // // adda op1, op2 ; op1 <- op2 + op3 00010000 // suba op1, op2 ; op1 <- op2 - op3 00010001 // mula op1, op2 ; op1 <- op2 * op3 00010010 // diva op1, op2 ; op1 <- op2 / op3 00010011 // moda op1, op2 ; op1 <- op2 % op3 00010100 // anda op1, op2 ; op1 <- op2 & op3 00010101 // ora op1, op2 ; op1 <- op2 | op3 00010110 // xora op1, op2 ; op1 <- op2 ^ op3 00010111 // shla op1, op2 ; op1 <- op2 << op3 00011000 // shra op1, op2 ; op1 <- op2 >> op3 00011001 // inc op1 ; op1 <- op2 + 1 00011010 - Note name // dec op1 ; op1 <- op2 - 1 00011011 - Note name // nop ; (do nothing) 00011100 - Note zero operands // // Augmented add1 is called inc. Augmented sub1 is called dec. Augmented mov // is called nop and takes 0 parameters. //
October 18, 2023 at 12:57 PM
Got a cup of coffee and made a plan for arithmetic instructions. Note the absence of unsigned operators like logical shift right, because who needs those when all words are signed?

Note that mov is considered one of the arithmetic opcodes (it's similar in structure to e.g. neg, just does nothing)
Instructions Arithmetic instructions (0-15) add op1, op2, op3 ; op1 <- op2 + op3 00000000 sub op1, op2, op3 ; op1 <- op2 - op3 00000001 mul op1, op2, op3 ; op1 <- op2 * op3 00000010 div op1, op2, op3 ; op1 <- op2 / op3 00000011 mod op1, op2, op3 ; op1 <- op2 % op3 00000100 and op1, op2, op3 ; op1 <- op2 & op3 00000101 or op1, op2, op3 ; op1 <- op2 | op3 00000110 xor op1, op2, op3 ; op1 <- op2 ^ op3 00000111 shl op1, op2, op3 ; op1 <- op2 << op3 00001000 shr op1, op2, op3 ; op1 <- op2 >> op3 00001001 add1 op1, op2 ; op1 <- op2 + 1 00001010 sub1 op1, op2 ; op1 <- op2 - 1 00001011 mov op1, op2 ; op1 <- op2 00001100 Arithmetic instructions ending in 1101, 1110, 1111 are reserved. Some candidates: abs op1, op2 ; op1 <- abs(op2) sgn op1, op2 ; op1 <- sign(op2) neg op1, op2 ; op1 <- -op2 add2 op1, op2 ; op1 <- op2 + 2 sub2 op1, op2 ; op1 <- op2 - 2
October 18, 2023 at 12:26 PM
Day 3 and can't decide whether to take a nap or get a coffee. Good 2 hours to go and some code needs written. Maybe should expand this poor opcode list today
export const opcodes: { [key: number]: string } = { 0b00000000: "add", // add <dst> <src1> <src2> - dst <- src1 + src2 0b00000001: "sub", // sub <dst> <src1> <src2> - dst <- src1 - src2 0b11110000: "hlt", // hlt <?> <?> <?> - halt program execution 0b11110001: "hcf", // hcf <?> <?> <?> - halt and catch fire }
October 18, 2023 at 11:01 AM
Writing tests is more convenient by allowing write8() to take multiple arguments:
// Write 8-bit unsigned byte `byte` to memory address `addr`, or `more` after // that if provided export function write8(addr: number, byte: number, ...more: Array<number>) { if (byte < 0 || byte >= 256) { error(`write8: byte doesn't fit ${byte}`) } if (addr < 0 || addr >= MEM_SIZE) { error(`write8: invalid address ${addr}`) } mem[addr] = byte if (more.length) { for (let i = 0; i < more.length; i++) { mem[addr + i + 1] = more[i] } } } test("writing bytes", () => { // add a.hi, b, c write8(0x100, instr.add, op.a_hi, op.b, op.c) // add a.lo, d, x write8(0x104, instr.add, op.a_lo, op.d, op.x) write8(0x108, instr.hlt) // Set initial values to registers and point PC to start write(addr.pc, 0x100) // Clear registers write(addr.a, 0) write(addr.b, 0x12) // 12 write(addr.c, 0x34) // + 34 -> 0x46__ write(addr.d, 0x56) // 56 write(addr.x, 0x78) // + 78 -> 0x__ce run() expect(read(addr.a)).toBe(0x46ce) })
October 17, 2023 at 9:12 PM
Let's make things a bit more consistent. Left: before, right: after
Code diff where "instructions." has been changed to "instr.", and registers like "A" to "op.a" when used as operand, but to "addr.a" when used as absolute address
October 17, 2023 at 7:51 PM
And here is the core of the virtual machine:
export function step(): boolean { let pc: number = registers.pc log(`step: pc ${print(pc)}`) let opcode: number = read8(pc++) let instr: string = opcodes[opcode] ?? "nop" let op1: number = read8(pc++) let op2: number = read8(pc++) let op3: number = read8(pc++) registers.pc = pc let op2value = readOperand(op2) let op3value = readOperand(op3) log( `step: instr ${instr} ${print(opcode)} ${print(op1)} ${print(op2)} ${print( op3, )}`, ) if (instr === "add") { let result = op2value + op3value writeOperand(op1, result) return true } if (instr === "hlt") { return false } if (instr === "hcf") { error("Machine caught fire") } return true }
October 17, 2023 at 9:31 AM
To read and write bytes we introduce readOperand() and writeOperand(), which are used to do the heavy lifting. We also need a function to read and sign-extend a byte, read8s(). Extra write function is not needed, write8 works for signed bytes as well.
function readOperand(op: number) { let lowest6bits = op & 0b0011_1111 if (op & 0b0100_0000) { return read8s(lowest6bits) } else { return read(lowest6bits) } } function writeOperand(op: number, value: number) { let lowest6bits = op & 0b0011_1111 if (op & 0b0100_0000) { write8(lowest6bits, value) } else { write(lowest6bits, value) } } export function read8s(addr: number) { if (addr < 0 || addr >= MEM_SIZE) { error(`read8: invalid address ${addr}`) } let result = mem[addr] if ((result & 0b1000_0000) > 0) { // Sign-extend return result | 0xffffff00 } else { return result } }
October 17, 2023 at 9:27 AM
hi() and lo() set the 7th bit of the operand, which turns on byte addressing (as opposed to word addressing, which is the default)
export function hi(op: number): number { return op | 0b0100_0000 } export function lo(op: number): number { return (op + 1) | 0b0100_0000 }
October 17, 2023 at 9:18 AM
After a bit of byte wrangling, we can now write and read bytes (which, upon reading, are sign-extended)
test("writing bytes", () => { // add a.lo, b, c write8(0x100, instructions.add) write8(0x101, hi(A)) write8(0x102, B) write8(0x103, C) // add a.hi, d, x write8(0x104, instructions.add) write8(0x105, lo(A)) write8(0x106, D) write8(0x107, X) write8(0x108, instructions.hlt) // Set initial values to registers and point PC to start write(PC, 0x100) // Clear registers write(A, 0) write(B, 0x12) // 12 write(C, 0x34) // + 34 -> 0x46__ write(D, 0x56) // 56 write(X, 0x78) // + 78 -> 0x__ce run() expect(read(A)).toBe(0x46ce) })
October 17, 2023 at 9:13 AM
Added some printf debugging machinery to find out why my second add instruction didn't run, can you guess why?
✓ jump relative with add [0.03ms] step: pc 0x0100 step: instr add (0x0000) step: pc 0x0104 step: instr hlt (0x00f0) ✓ program with byte addressing [0.08ms] test("program with byte addressing", () => { // add a, a, c.hi write8(0x100, instructions.add) write8(0x101, A) write8(0x102, A) write8(0x103, hi(C)) // add b, c, c.lo write8(0x104, instructions.add) write8(0x105, B) write8(0x106, B) write8(0x107, lo(C)) write8(0x104, instructions.hlt) // Set initial values to registers and point PC to start write(PC, 0x100) // C contains high byte 0x1f, and low byte 0xf1 write(C, 0x1ff1) debugOn() run() debugOff() // expect(read(A)).toBe(0x1f) // B should be sign-extended // expect(read(B)).toBe(0xfff1) })
October 17, 2023 at 8:37 AM
Day 2 of virtual machine hacking, think I’ll do byte addressing now
Autumn
October 17, 2023 at 8:19 AM
What we have now is direct addressing, e.g. [0x1234]. This extends the design with indirect addressing using either immediate or an index register, allowing things like [pc + 5] and [p + i]. Also byte addressing is supported with syntax [0x1234].b
Operand format: Direct addressing (word), values 0..63: 00mmmmmm: [M], where M is number 0-63 Direct addressing (byte), values 64..127: 01mmmmmm: [M].b, where M is number 0-63 Indirect addressing with immediate offset (word), values 128..175: 10ooooaa: [<rega> + O], where <rega> is selected with bits 'aa' and O is the range 0b0000-0b1011, represented by bits 'oooo', mapped to values -6 to 5 Indirect addressing with index register (word), values 176..191: 1011iiaa: [<rega> + <regi>], where <rega> is selected with bits 'aa' and <regi> is selected with bits 'ii' Indirect addressing with immediate offset (byte), values 192..239: 11ooooaa: [<rega> + O].b, where <rega> is selected with bits 'aa' and O is range 0b0000-0b1011 mapped to values -6 to 5 Indirect addressing with index register (byte), values 240..255: 1111iiaa: [<rega> + <regi>].b, where <rega> is selected with bits 'aa' and <regi> is selected with bits 'ii'
October 16, 2023 at 1:40 PM
Operands are now simply 8 bits and denote memory addresses 0x00 to 0xff. I have a slightly more complex design in mind but let's get some syntax defined first. This also details how to address lower and higher parts of registers:
Syntax [M] means the word at memory address M. [M].b means the byte at memory address M. When read, it is sign-extended to a word. <reg> is equivalent to [addressof <reg>], where <reg> is one of registers (a, b, c, d, x, y, i, j, p, q, sp, pc), and addressof <reg> is the memory address of the register according to the table below. <reg>.hi is equivalent to [address of <reg>].b <reg>.lo is equivalent to [address of <reg> + 1].b Table of registers and their addresses: a: 0x0 a.hi: 0x0 a.lo: 0x1 b: 0x2 b.hi: 0x2 b.lo: 0x3 c: 0x4 c.hi: 0x4 c.lo: 0x5 d: 0x6 d.hi: 0x6 d.lo: 0x7 x: 0x8 x.hi: 0x8 x.lo: 0x9 y: 0xa y.hi: 0xa y.lo: 0xb i: 0xc i.hi: 0xc i.lo: 0xd j: 0xe j.hi: 0xe j.lo: 0xf p: 0x10 p.hi: 0x10 p.lo: 0x11 q: 0x12 q.hi: 0x12 q.lo: 0x13 sp: 0x14 sp.hi: 0x14 sp.lo: 0x15 pc: 0x16 pc.hi: 0x16 pc.lo: 0x17 Finally: <regi> is one of x, y, i, j <rega> is one of p, q, sp, pc
October 16, 2023 at 1:26 PM
We also accidentally implemented jumping, which can be done by adding values to PC
test("jump relative with add", () => { // Load program "add pc, pc, a" to memory address 0x100 write8(0x100, instructions.add) write8(0x101, PC) write8(0x102, PC) write8(0x103, A) // Load program "hlt" to memory address 0x200 write8(0x200, instructions.hlt) write(PC, 0x100) // Offset that should jump to 0x200 write(A, 0x100 - 4) let cont = step() expect(read(PC)).toBe(0x200) expect(cont).toBe(true) cont = step() expect(read(PC)).toBe(0x204) expect(cont).toBe(false) })
October 16, 2023 at 9:49 AM
And our first program that performs the operation A = B + C and then halts. And another that causes the machine to catch fire. Time for lunch!
test("simple program", () => { // Load program "add a, b, c; hlt" to memory address 0x100 write8(0x100, instructions.add) write8(0x101, A) write8(0x102, B) write8(0x103, C) write8(0x104, instructions.hlt) // hlt also has pseudo-operands; this will change write8(0x105, 0) write8(0x106, 0) write8(0x107, 0) // Set initial values to registers and point PC to start write(PC, 0x100) write(B, 0x1234) write(C, 0x5432) let cont = step() expect(read(PC)).toBe(0x104) expect(read(A)).toBe(0x6666) step() expect(read(PC)).toBe(0x108) }) test("halt and catch fire", () => { write8(0x100, instructions.hcf) write(PC, 0x100) expect(() => step()).toThrow("Machine caught fire") })
October 16, 2023 at 9:39 AM
Time to implement our first machine language. Introducing instructions ADD, HLT and HCF (Halt and Catch Fire). All have 3 operands for simplicity, though only ADD uses them. Operands are simply memory addresses (or registers, since they are mapped to addresses 0-31)
export const opcodes: { [key: number]: string } = { 0b00000000: "add", // add <dst> <src1> <src2> - dst <- src1 + src2 0b11110000: "hlt", // hlt <?> <?> <?> - halt program execution 0b11110001: "hcf", // hcf <?> <?> <?> - halt and catch fire } // Reverse mapping of opcodes (to make it easier to write programs) export const instructions: { [opcode: string]: number } = {} for (let opcode in opcodes) { instructions[opcodes[opcode]] = Number(opcode) } // Read and execute one instruction at pc. Returns false if machine halted export function step(): boolean { let pc: number = registers.pc let opcode: number = read8(pc++) let instr: string = opcodes[opcode] ?? "nop" let op1: number = read8(pc++) let op2: number = read8(pc++) let op3: number = read8(pc++) registers.pc = pc if (instr === "add") { write(op1, read(op2) + read(op3)) return true } if (instr === "hlt") { return false } if (instr === "hcf") { error("Machine caught fire") } return true }
October 16, 2023 at 9:35 AM
Added 8-bit reading and writing. 16-bit reads and writes are signed, but 8-bit reads and writes are unsigned (no sign extension when reading). That might be reconsidered later if needed
// Write 16-bit big endian signed word `word` to memory address `addr` export function write(addr: number, word: number) { if (word < -32768 || word > 32767) { // Alternatively, we might just do `& 0xffff` and be done with it error(`write: word doesn't fit ${word}`) } let hi = (word & 0xff00) >> 8 let lo = word & 0x00ff if (addr < 0 || addr >= MEM_SIZE - 1) { if (addr === MEM_SIZE - 1) { mem[addr] = hi mem[0] = lo } else { error(`write: invalid address ${addr}`) } } mem[addr] = hi mem[addr + 1] = lo } // Write 8-bit unsigned byte `byte` to memory address `addr` export function write8(addr: number, byte: number) { if (byte < 0 || byte >= 256) { error(`write8: byte doesn't fit ${byte}`) } if (addr < 0 || addr >= MEM_SIZE) { error(`write8: invalid address ${addr}`) } mem[addr] = byte } test("read byte from memory", () => { mem[0] = 0x44 mem[1] = 0xff expect(read8(0)).toBe(0x44) // Note: not negative, bytes are always unsigned expect(read8(1)).toBe(0xff) }) test("write byte to memory", () => { write8(0, 0x33) write8(0xffff, 0xff) expect(mem[0]).toBe(0x33) expect(mem[0xffff]).toBe(0xff) expect(() => write8(0, -1)).toThrow() expect(() => write8(0, 256)).toThrow() })
October 16, 2023 at 8:55 AM
Initial plans for registers: we'll have 4 general purpose registers (A B C D), 4 index registers (I J X Y), four address registers (P Q SP PC). And a bunch of reserved ones just in case we need some more. These 16 registers are mapped to memory addresses 0-31.
// Register layout: // Memory address: | 0 | 1 | 2 | 3 | 4 | 5 | 6 | 7 | 8 | 9 | a | b | c | d | e | f | // Register: | a | b | c | d | x | y | i | j | // // Memory address: | 10 | 11 | 12 | 13 | 14 | 15 | 16 | 17 | 18 | 19 | 1a | 1b | 1c | 1d | 1e | 1f | // Register: | p | q | sp | pc | <reserved> | // const A = 0x00 const B = 0x02 const C = 0x04 const D = 0x06 const X = 0x08 const Y = 0xa const I = 0xc const J = 0xe const P = 0x10 const Q = 0x12 const SP = 0x14 const PC = 0x16 const registers = { get pc() { return read(PC) }, set pc(val: number) { write(PC, val) }, // TODO other registers } export function step() { let pc = registers.pc let opcode = read8(pc++) let op1 = read8(pc++) let op2 = read8(pc++) let op3 = read8(pc++) registers.pc = pc // TODO decode and execute instruction }
October 16, 2023 at 8:39 AM
The boring part related to reading and writing should be mostly done now.
export function write(addr: number, num: number) { if (num < -32768 || num > 32767) { // Alternatively, we might just do `& 0xffff` and be done with it error(`write: number doesn't fit ${num}`) } let hi = (num & 0xff00) >> 8 let lo = num & 0x00ff if (addr < 0 || addr >= MEM_SIZE - 1) { if (addr === MEM_SIZE - 1) { mem[addr] = hi mem[0] = lo } else { error(`write: invalid address ${addr}`) } } mem[addr] = hi mem[addr + 1] = lo } 10 passing tests
October 16, 2023 at 8:05 AM
Implementation starting to a look a bit hairy already
export function read(addr: number) { let data if (addr < 0 || addr >= MEM_SIZE - 1) { if (addr === MEM_SIZE - 1) { data = (mem[addr] << 8) + mem[0] } else { error(`read: invalid address ${addr}`) } } else { data = (mem[addr] << 8) + mem[addr + 1] } if ((data & 0x8000) > 0) { return data - 0x10000 } else { return data } }
October 16, 2023 at 7:44 AM
I guess we need negative numbers too. Maybe all numbers should be signed for now, let's deal with the unsigned/signed complexity later.
test("read negative word", () => { mem[0] = 0xff mem[1] = 0xff expect(read(0)).toBe(-1) }) test("boundary between negative and positive", () => { mem[0] = 0x7f mem[1] = 0xff mem[2] = 0x80 mem[3] = 0x00 expect(read(0)).toBe(32767) expect(read(2)).toBe(-32768) })
October 16, 2023 at 7:42 AM