Check out full showcase at: https://ngi.fyi/ocpsummit25yt to get the attendee and sponsor perspectives from the show floor of the #OCPGlobalSummit 2025 UALink Consortium Chairman Kurtis Bowman discusses the consortium's collaboration with the Open Compute Project and reveals key technical advantages of the UALink interconnect technology. Bowman outlines how UALink delivers superior performance through lower power consumption, reduced latency, and enhanced bandwidth efficiency compared to existing solutions. He provides insights into the growing member ecosystem and shares the consortium's roadmap for market deployment, while explaining the strategic philosophy behind open standards in accelerator interconnect technology. **What You Will Learn:** - How UALink's technical architecture achieves lower power and latency than competing solutions - The bandwidth efficiency advantages that enable near-theoretical data transfer rates - Timeline for UALink adoption across data centers and member product availability - Why consortium collaboration with organizations like OCP drives industry innovation - AMD's competitive strategy around open standards versus proprietary approaches - The role of openness in fostering multi-vendor innovation and market advancement 📚 CHAPTERS: 0:00:00 - Introduction and OCP Partnership 0:00:24 - UALink Technical Advantages and Performance Benefits 0:01:19 - Bandwidth Efficiency and Real-Time Applications 0:01:33 - Member Ecosystem and Market Timeline 0:01:58 - The Philosophy of Openness in Technology Standards 0:02:21 - AMD's Innovation Strategy and Competitive Approach Want to be involved our video series? Contact [email protected]

Kurtis Bowman Director, Architecture and Strategy - AMD    The rapid proliferation of AI and HPC workloads demands unprecedented levels of interconnect performance, scalability, and efficiency within data centers. Proprietary solutions have historically limited choice and driven up costs. The UALink Consortium, formed by leading industry players, is tackling this challenge head-on by developing an open industry standard for high-performance accelerator-to-accelerator communication. This session will delve into the newly released UALink 1.0 Specification, highlighting its architectural innovations designed for low-latency, high-bandwidth communication among hundreds to thousands of AI accelerators within a single pod. We will discuss how UALink enables simple load, store, and atomic operations with software coherency, crucial for maximizing AI model training and inference efficiency. We will detail the strategic collaboration between the UALink Consortium and the Open Compute Project (OCP) Foundation.

Rohit Mittal Head of AI Products and Technologies - UpscaleAI, Chris Petersen Fellow of Technology and Solution Architecture - Astera Labs, Josh Collier Engineer - Intel, Priyank Shukla Director of Product Management - Synopsys   As AI compute demands continue to rise, Cloud Service Providers, System OEMs, and IP-Silicon Providers require a high-performance, efficient solution to meet the challenges of scale-up AI infrastructure. The UALink Specification delivers a low-latency, high-bandwidth interconnect designed to enable fast, efficient communication between accelerators and switches within AI computing pods, boosting performance while improving power and cost efficiency.  In this panel, UALink experts will explore real-world applications and use cases for the technology, highlighting how UALink supports the development of next-generation AI-ML scale-up systems. The discussion will also cover the importance of supply chain diversity and system interoperability enabled by UALink. Attendees will gain insight into the specification roadmap and upcoming enhancements to UALink technology.

The Ultra Accelerator Link™ (UALink™) Consortium is an open industry standard group dedicated to advancing the UALink specification. The Consortium recently released the UALink 200G 1.0 Specification, which defines a low-latency, high-bandwidth interconnect for communication between accelerators and switches in AI computing pods. The webinar introduced the features in the 1.0 specification and highlighted the key benefits of UALink for AI applications. Attendees had a unique opportunity to participate in a live Q&A with our UALink technology experts. Speakers: - Nathan Kalyanasundharam, UALink TTF Co-Chair and Corporate Fellow at AMD - Chris Petersen, UALink Director and Fellow of Technology & Ecosystems at Astera Labs - Peter Onufryk, UALink President and Fellow at Intel

What will it take to enable the next generation of AI infrastructure? At the AI Infrastructure Summit 2025 in Santa Clara, California, Kurtis Bowman, Chairman of the UALink Consortium, discussed the group’s mission to accelerate open standards for ultra-high-bandwidth interconnects. 📌 Time Stamps 00:00 – Introduction 00:28 – What is UALink and why it matters for AI infrastructure 01:15 – Key members and the power of industry collaboration 02:05 – Latest milestones and recent releases 03:00 – Looking ahead: how UALink will impact future data center designs 👉 Companies interested in shaping the future of data center networking for AI and cloud workloads are invited to participate in our upcoming Data Center Networking Showcase Series on NextGenInfra.io, beginning this November. Join the conversation with industry leaders who are defining what’s next for networking.

As the demand for AI compute grows, Cloud Service Providers, System OEMs, and IP/Silicon Providers need an efficient, optimized solution to address scale-up AI challenges. The UALink 200G 1.0 Specification defines a low-latency, high-bandwidth interconnect for communication between accelerators and switches in AI computing pods. By increasing performance, improving power and cost efficiency and introducing supply chain diversity and interoperability, UALink enables next-generation AI/ML applications. During this session, a UALink expert highlighted the technology’s latest advancements and demonstrated how UALink will help create multi-node scale-up systems with enhanced memory semantics for AI applications. Attendees had the opportunity to ask questions about the future applications and benefits of UALink devices. Speaker: Derek Williams, AMD Fellow, AMD

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