A. Schilling
@aschilling.bsky.social
630 followers 58 following 390 posts
Editor at hardwareluxx.de
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OpenAI and Tachyum announce strategic partnership to deploy 10 Quadrillion Watts of Compute Power without deploying any actual Chip made by Tachyum.
TSMC Revenue by Node as of Q3 2025.

We should see N2 emerging by Q1 2026 in this graph.
Apple M5

- 4x Performance Core
- 6x Efficiency Core
- +15% nT Performance
- +45% higher GPU Performance
- 153 GB/s Memory Interface
- 3 nm Process
Intel just announced Crescent Island. Crescent Island is a new Intel Data Center GPU offering that will arrive in the second half of 2026. Knows features:

- air-cooled
- Xe3P microarchitecture
- 160 GB of LPDDR5X

Looks like a competitor to Rubin CPX and token optimized XPUs.
At 2025 OCP Global Summit AMD shows their Helios rack-scale solution. These are liquid-cooled, 72-GPU racks powering AMD Instinct MI450 Series GPUs, AMD EPYC CPUs (Venice) and do feature integrated UALoE scale-up connectivity.
Interesting project by der8auer: Spray cooling with Novec 7000. Acceptable idle temperatures, nothing more. Just a POC.

But, spray cooling was used with the Cray X1 supercomputer. Small holes in the heatspreader sprayed directly onto the small chips, and the gas was returned.
It's official! OpenAI and Broadcom announce strategic collaboration to deploy 10 GW of OpenAI-designed AI accelerators.

OpenAI and Broadcom have signed a term sheet to deploy racks incorporating the AI accelerators and Broadcom networking solutions.
One of the slides that shows the potential of #PantherLake the best. 4P+8E+4LPE cores on par with 4P+4LPE (Lunar Lake) and better than 6P+8E+2LPE (Arrow Lake-H), where the allocation of those LPE cores had it’s hurdles.
Robinson Lake reference design for embedded/robotics #PantherLake solutions. The CPU is rated for an extended temperature range of -40 °C to 105 °C. The memory chips are labeled with 4ZC42 DBFVB from Micron. #IntelTechTour
This is a #Intel18A wafer with #PantherLake compute tiles.

I did a quick annotation (see 2nd picture attached).
I had the opportunity to visit Intel's #Fab52 at the Ocotillo campus in Chandler, Arizona. This is where Intel manufactures its chips in #Intel18A. In this report, I attempt to convey the enormous dimensions and challenges involved. #IntelTechTour

www.hardwareluxx.de/index.php/ne...
A switch from #Crestmont to #Darkmont and thus a significant leap in CPU performance, but still platform-compatible and technically impressive with #Intel18A + #FoverosDirect3D. Intel provides further details on #ClearwaterForest, also known as #Xeon6+.

www.hardwareluxx.de/index.php/ne...
Based on todays details about #PantherLake and #ClearwaterForest, we took another look at the details of #Intel18A, #PowerVia (including Omni MIM), #RibbonFET, and #Foveros. #IntelTechTour

www.hardwareluxx.de/index.php/ne...
New (revised) E- and P-Cores, a new Xe3 GPU, significantly more efficient NPU 5 and #PantherLake in three chip configurations with a mix and match of #Intel18, #Intel3 and TSMC N6 and N3E — today we take a look at the details of Intel's upcoming CPU gen.

www.hardwareluxx.de/index.php/ar...
300 mm GaN-on-Si wafer from Aixtron as presented by imec
According to Prashanth Aprameyan, GM for Intel 18A & Intel 3 at Intel Foundry Services, Intel 18A-P will enter HVM by the end of 2026. This is following what Intels own roadmaps are showing.

My question is: Which product(s) will use Intel 18A-P?
With Intel 18A the company will use Omni MIM capacitor on the backside of the BSPDN with a capacitive density of 397 fF/µm², while current designs can go up to 376 fF/µm² (on Intel 4) depending on wether this is multi-plate or single-plate design.
Qualcomm to acquire Arduino – Accelerating Developers’ Access to its Leading Edge Computing and AI

www.qualcomm.com/news/release...
Just visited Intel Fab 42 and Fab 52 on Ocotillo campus in Arizona, where Intel will manufacture Intel 18A for Panther Lake and Clearwater Forest. #IntelTechTour
Did some pixel counting: Based on the known dimension for the LPDDR5X packages, the Snapdragon X2 Elite Extreme is about 13.9 × 20.7 mm.
Qualcomm uses the N3 node by TSMC for the Snapdragon X2 Elite Extreme. But it's utilizing TSMCs FinFlex, so primarily N3P and for some parts N3X – for the Prime Cores for example. So Qualcomm gets the trade off between efficiency and performance for their monolithic design.
Qualcomm uses the N3 node by TSMC for the Snapdragon X2 Elite Extreme. But it's utilizing TSMCs FinFlex, so primarily N3P and for some parts N3X – for the Prime Cores for example. So Qualcomm gets the trade off between efficiency and performance for their monolithic design.
Wafer based on #imec 300 mm spin qubit platform used by #Diraq.