Author | Lightnews

Semiconductor Engineering

Semiconductor Engineering

@semiengineering.bsky.social

1.3K followers 1K following 280 posts

Deep insights for the chip industry. semiengineering.com Hot topics: semiconductor, EDA, advanced packaging, hardware, low power, HPC, hardware security, automotive chips, embedded, edge computing, semiconductor manufacturing, chip design, VLSI

Posts Media Videos Starter Packs

Semiconductor Engineering @semiengineering.bsky.social · 7h

Physical AI holds the promise of making everything from robots to a slew of mobile edge devices much more interactive and useful, but it will significantly alter how systems are designed, verified, and monitored.

semiengineering.com/multiple-cha...

#physicalAI #robots #edge #verification #AI #EDA

Multiple Challenges Emerge With Physical AI System Design

Workloads, system performance, and the need to continually learn and adapt are demolishing constraints that have made chip design and verification consistent and reliable.

semiengineering.com

Semiconductor Engineering @semiengineering.bsky.social · 2d

As part of the move to increase efficiency, power supply units are moving from the bottom trays to their own racks.
semiengineering.com/data-centers...

Data Centers Boost Voltage For Higher Efficiency

As part of the move to increase efficiency, power supply units are moving from the bottom trays to their own racks.

semiengineering.com

Semiconductor Engineering @semiengineering.bsky.social · 5d

Chip Industry Week in Review
semiengineering.com/chip-industr...
Germany’s IC strategy; Adv. packaging roadmap; GF’s auto chiplets; AI finds HW trojans w/97% accuracy; China’s EDA; high-NA EUV; TSMC, ASML, Samsung earnings; Silicon Valley events blitz; PDN problems and more..

#semiconductor

Semiconductor Engineering @semiengineering.bsky.social · 6d

SemiEngineering's latest Special Report
semiengineering.com/current-prob...

#PDN #semiconductor #PowerDeliveryNetwork

Current Problems Grow For Power Delivery

Failure to get sufficient current to devices when they need it results in voltage droop, timing delays, and functional failures.

semiengineering.com

Semiconductor Engineering @semiengineering.bsky.social · 7d

Hybrid Approach Emerges For Edge/Cloud Inspection Of Chips:
An explosion in data from inspection images and metrology measurements is creating a confusing set of demands for chipmakers and their equipment vendors. semiengineering.com/hybrid-appro...

#semiconductor #edgecomputing #cloud #inspection

Hybrid Approach Emerges For Edge/Cloud Inspection Of Chips

Processing massive amounts of data needs to be balanced against quick adjustments in tools.

semiengineering.com

Semiconductor Engineering @semiengineering.bsky.social · 8d

The SRC just released its Microelectronics and Advanced Packaging Technologies (MAPT) Roadmap 2.0, an update to the industry’s first 3D semiconductor roadmap.
semiengineering.com/new-release-...

#semiconductor

Microelectronics and Advanced Packaging Technologies Roadmap 2.0 (SRC)

The Semiconductor Research Corporation just released its Microelectronics and Advanced Packaging Technologies (MAPT) Roadmap 2.0, a comprehensive update to the industry’s first 3D semiconductor roadma...

semiengineering.com

Semiconductor Engineering @semiengineering.bsky.social · 8d

Special Report: When a good die fails test & gets scrapped, often no one notices, because false failures look identical to real ones. Yet across the industry, these phantom defects are quietly eroding yield, inflating test costs & masking problems
semiengineering.com/defeating-ov...

#semiconductor

Metrology’s Growing Role In Reducing False Defects

Reducing nuisance defects requires tighter integration of inspection, test, and analytics.

semiengineering.com

Semiconductor Engineering @semiengineering.bsky.social · 9d

New technical papers recently added to Semiconductor Engineering’s library
semiengineering.com/chip-industr...

#semiconductor

Reposted by Semiconductor Engineering

Semiconductor Engineering @semiengineering.bsky.social · 12d

Latest news in the chip industry: semiengineering.com/chip-industr...

#semiconductor

Chip Industry Week in Review

Geopolitical hijinks: export controls, rare earths, and blacklists; SEMICON West announcement blitz; Intel readies 18A; AMD-OpenAI 6 GW deal; new 300mm GaN program; fab spending and EDA reports; acqui...

semiengineering.com

Semiconductor Engineering @semiengineering.bsky.social · 11d

SemiEngineering has over 500 Tech Talk videos to learn from.
www.youtube.com/user/Sperlin...
Hot topics included challenges involving chiplets/ heterogeneous integration, AI, data management, DRAM, manufacturing and test & much more. Let us know what other topics are of interest.

#semiconductor

Semiconductor Engineering @semiengineering.bsky.social · 12d

Latest news in the chip industry: semiengineering.com/chip-industr...

#semiconductor

Chip Industry Week in Review

Geopolitical hijinks: export controls, rare earths, and blacklists; SEMICON West announcement blitz; Intel readies 18A; AMD-OpenAI 6 GW deal; new 300mm GaN program; fab spending and EDA reports; acqui...

semiengineering.com

Semiconductor Engineering @semiengineering.bsky.social · 13d

Location verification is gaining traction as a way of strengthening supply chain oversight with minimal effort, fueled by tightening export controls & growing concerns about AI chip smuggling & counterfeiting
semiengineering.com/location-ver...

#locationverification #semiconductor #locationtracking

Location Verification Becomes Much Bigger Concern For Chips

Mature methods can show where a chip is shipped, and even restrict where it is being used.

semiengineering.com

Semiconductor Engineering @semiengineering.bsky.social · 14d

How 3D-IC Will Change Chip Design:
Stacking dies will dramatically improve performance, but it’s still a work in progress.
Final in 3 part series with 5 experts
semiengineering.com/how-3d-ic-wi...

#3DIC #semiconductor #chiplets

Semiconductor Engineering @semiengineering.bsky.social · 15d

Smarter Packaging: How AI is Reshaping Assembly and Materials Control
semiengineering.com/smarter-pack...

Smarter Packaging: How AI is Reshaping Assembly and Materials Control

From predictive maintenance to excursion monitoring, AI is redefining yield management in multi-die assembly.

semiengineering.com

Semiconductor Engineering @semiengineering.bsky.social · 16d

Startup Funding: Q3 2025:
The third quarter was dominated by massive rounds, with 75 companies raising $6 billion.
semiengineering.com/startup-fund...
#semiconductor #startups #AI #photonics #quantum #AIhardware

Startup Funding: Q3 2025

Blowout quarter for AI and quantum; 75 companies raise $6 billion.

semiengineering.com

Semiconductor Engineering @semiengineering.bsky.social · 17d

Special Report: Glass Substrates Gain Momentum:
semiengineering.com/glass-substr...

#semiconductor #GlassSubstrates

Glass Substrates Gain Momentum

Benefits increase with package size, but not all the kinks have been worked out.

semiengineering.com

Semiconductor Engineering @semiengineering.bsky.social · 19d

Latest news and reports in the chip industry semiengineering.com/chip-industr...
#semiconductor

Chip Industry Week in Review

OpenAI DRAM capacity deals in Korea; $4.4B IC equipment merger; Taiwan rebuffs US' 50-50 split offer; EU Chips Act revision; Meta buys RISC-V startup; foundry report; imec transition; NIST disses Deep...

semiengineering.com

Semiconductor Engineering @semiengineering.bsky.social · Sep 17

The chip industry traditionally has relied on margins to help them mitigate timing problems, but an increasing array of factors are now influencing timing. Can static timing analysis evolve to address these problems?
semiengineering.com/the-demise-o...

#verification #EDA #semiconductor

The Demise Of Static Timing Verification?

Timing is increasingly dependent on vectors. Can static techniques continue to deliver the necessary results? Maybe.

semiengineering.com

Semiconductor Engineering @semiengineering.bsky.social · Sep 16

6G is expected to bring data speeds that enable highly integrated and responsive technology in smartphones, homes, cities, and autonomous vehicles, but realizing that goal will require a lot more work.
semiengineering.com/new-antennas...
#6G

New Antennas And Advanced ICs Needed For 6G

Higher frequencies bring more complexity to every part of the network, from tiny antennas to powerful base station processors.

semiengineering.com

Semiconductor Engineering @semiengineering.bsky.social · Sep 15

The complexity of connecting different layers to create high-fidelity models, what those layers need to include, and why standards are needed to maximize their benefits and simplify their creation. With David Fried, VP at Lam Research
youtu.be/2ulbbpB-1W4?...

#semiconductor #virtualtwins

YouTube video by Semiconductor Engineering

Semiconductor Engineering @semiengineering.bsky.social · Sep 14

New technical papers recently added to Semiconductor Engineering’s library:
semiengineering.com/chip-industr...

#semiconductor #DRAM #SRAM #EDA #MRAM #cybersecurity

Semiconductor Engineering @semiengineering.bsky.social · Sep 12

Latest news in the chip industry semiengineering.com/chip-industr...

#semiconductor

Chip Industry Week in Review

Chinese site licenses for chip equipment; HBM4; Natcast layoffs; ASML's big AI investment; AI data center risks; critical minerals; Intel's leadership changes; MLPerf results; DRAM drilldown; soft mat...

semiengineering.com

Semiconductor Engineering @semiengineering.bsky.social · Sep 11

A growing number of AI processors are being designed around specific workloads rather than standardized benchmarks, optimizing performance and power efficiency, but often with enough flexibility to adapt to future changes. semiengineering.com/balancing-wo...

#processors #AIworkloads #GPU #NPU #CPU

Balancing Workloads In AI Processor Designs

Optimization and architecture definition are important, but there's a downside to too much customization.

semiengineering.com

Semiconductor Engineering @semiengineering.bsky.social · Sep 10

Limitations of supervised FDC, which relies on previous faults, and why unsupervised FDC is necessary to reduce scrap and predict where failures will occur. This is the third part in a seven-part series on AI in manufacturing.
semiengineering.com/using-ai-for...

Using AI For Fault Detection And Classification In Manufacturing

Supervised vs. unsupervised FDC and its impact on yield.

semiengineering.com

Semiconductor Engineering @semiengineering.bsky.social · Sep 8

Changes are coming as DRAM is called upon to store & retrieve more data faster. This Tech Talk looks at how DRAM works, the impact of cooling new solutions in denser configurations, & ongoing issues involving the security of data.

semiengineering.com/the-evolutio...
#DRAM #HBM #LPDDR #GDDR

The Evolution of DRAM

How and why this tried-and-true memory is changing.

semiengineering.com